Microvias are small holes in the range of 50 -100 µm. In most cases they are blind vias from the outer layers to the first innerlayer.
The development of very complex Integrated Circuits (ICs) with extremely high input/output counts coupled with the steadily increasing clock rates has forced the electronic manufacturer to develop new packaging and assembly techniques. Components with pitches less then 0.30 mm, chip scale packages, and flip chip technology are underlining this trend and highlight the importance of new printed wiring board technologies able to cope with the requirement of modern electronics.
In addition, more and more electronic devices have to be portable and consequently systems integration, volume and weight considerations are gaining importance.
These portables are usually battery powered resulting in a trend towards lower voltage power supplies, with their implication in PCB (Printed Circuit Board) complexity.
As a result of the above considerations, the future PCB will be characterized by very high interconnection density with finer lines and spaces, smaller holes and decreasing thickness. To gain more landing pads for small footprint components the use of microvias becomes a must.
They are essential in setting the pace of electronic developments and the circuit board is under pressure to keep up.
From the automobile industry through to industrial electronics, the importance of microelectronics has risen enormously in recent years. At the same time, it has developed into an essential feature of intelligent devices and systems. The demand for reduced volume and weight, enhanced system performance with shorter signal transit times, increased reliability and minimised system costs have become progressively more important. And as a consequence, this means that heightened demands are placed on developers and layout engineers.
While microvia technology has long since become a telecommunications manufacturing standard, it is now penetrating other market segments. Here microvia technology offers the potential to completely fulfil the demands for technically perfect solutions and rational production. In other words - this technology unites modern technology and economics. Looking at the circuit board industry in the cold light of day, it is apparent that it has a cost-efficient, safe and proven technology at its disposal. With the aid of microvias, the integration of modern components on the boards requires only minor modifications to the multi-layer architecture. Many of the requirements placed on electronic products can be realised without problems as a result. HDI (High Density Interconnect) involves using microvias for high density interconnection of numerous components and functions within a confined space. Microvia circuit boards manage without conventional mechanically drilled through contacts and use the appropriate laser drilling machines as drilling tools.
The drivers for HDI microvia technology are the various component formats, such as COB (Chip on Board), Flip Chip, CSP (Chip Size Packaging) and BGA (Ball Grid Arrays), which are described in terms of "footprint" or pitch. The footprint characterises the overall solder surface, connection surface or landing sites for SMD components. Pitch denotes the separation between the midpoints of the individual solder surfaces. Many new components arrive on the market with a large number of connections and a low pitch which demand a further increase in wiring density on the circuit board. This demonstrates why the challenges facing the technical knowledge of the circuit board designer and the implementation options are so infinitely important for new components. Because even at this early stage, the profitability, as well as the rational technical feasibility and process compatibility of the boards, are decided. This highlights how strongly circuit board development is influenced by the development of components and their geometric design.
In the past, microvias were still staggered relative to one another as a means of achieving contact over several layers. New techniques, with which microvias generate connections across two layers, have become established as particularly cost-effective and efficient in their manufacturing technology. These holes can be produced in one program starting from the outer layer.
Cu-filled microvias represent the latest development ready for series production. Special feature of this technology: The vias can be set directly on top of each other. With this method it is possible to layout components even in very confined geometries.
When are microvias worthwhile?
No textbook specifies where the transition between mechanical drill holes and laser holes is to be found. After all, the application of microvias is not only determined by the technology or the geometry of the components and consequently the circuit board geometry. However, questions concerning profitability can be clearly answered through the application of microvias. In the light of Würth Elektronik's experience from today's perspective, a clear technical boundary can be drawn at a BGA pitch of 0.8 mm. Here conventional technology, with mechanically drilled vias, meets its limitations and the use of microvias (laser drilled blind vias) is necessary.
Naturally however, economic considerations for or against play a significant role. A comparison of variable drilling costs reveals the superiority of microvia technology over mechanical drilling (Ø 0.3 mm) even with a relatively small number of holes. The 100x faster drilling speed and the tool costs approaching ZERO make laser drilling extremely fast and cheap. This effect becomes more pronounced as the number of drill holes increases. The comparison clearly illustrates the cost saving potential via technology has to offer. Experience at Würth Elektronik shows that the proper application of this technology results in savings of between eight and ten percent of the overall costs of "conventional circuits". The advantage of via technology grows beyond measure if smaller drills have to be used for geometrical reasons. The drill unit costs rise dramatically. And the service life of the drills plummets. The cost differential opens up enormously for Ø 0.1 mm mechanically drilled vias compared with Ø 0.1 mm laser drilled microvias. Here the variable costs are in a ratio of around 500:1.
As the need for high-density, handheld products increases, the electronic packaging industry has been developing new technologies, such as chip-scale packaging and §ip-chip assembly, to pack more information-processing functions per unit volume. Many system designers, however, believe that the circuit board technology to accommodate packages with high I/O densities has not kept pace. Even though printed wiring board fabricators have been developing new, higher-density circuit fabrication methods, the system designers perceive today's advanced technology as unproven, low reliability, and high cost. IBIS Associates applies Technical Cost Modeling in this paper to examine the cost issues of implementing microvia technology.
CSPs and microvias go hand-in-hand: What is the value of high-I/O-density, chip-scale packaging without a high- density substrate to connect these chips? Alternatively, why have a circuit board with ultrafine features if coarse-pitch devices will be used?
Yet, many system designers believe that either CSPs or microvia technology (or both) mean higher system costs. Certainly, it is wise to be cautious about employing new technologies. But if there are proven technologies that can offer system cost reduction as well as system performance improvements and size reduction, what are you waiting for?
IBIS Associates has studied the cost impact of microvia technologies on circuit board fabrication1, and of CSP technologies on IC packaging2. This paper shows some of these cost analyses, revealing the cost savings possible through the use of these advanced technologies.
CSPs and microvias go hand-in-hand: What is the value of high-I/O-density, chip-scale packaging without a high- density substrate to connect these chips? Alternatively, why have a circuit board with ultrafine features if coarse-pitch devices will be used?
Yet, many system designers believe that either CSPs or microvia technology (or both) mean higher system costs. Certainly, it is wise to be cautious about employing new technologies. But if there are proven technologies that can offer system cost reduction as well as system performance improvements and size reduction, what are you waiting for?
IBIS Associates has studied the cost impact of microvia technologies on circuit board fabrication1, and of CSP technologies on IC packaging2. This paper shows some of these cost analyses, revealing the cost savings possible through the use of these advanced technologies.
Methodology-Technical Cost Modeling
Technical Cost Modeling (TCM), a methodology pioneered by IBIS Associates, provides the method for analyzing cost1. The goal of TCM is to understand the costs of a product and how these costs are likely to change with alterations to the product and process.
Specifically, TCM includes the breakdown of cost into its constituent elements (listed below), and ranking cost items on the basis of their contribution:
- Materials and energy
- Direct and overhead labor
- Equipment, tooling and building
- Other costs
Once these costs are established, sensitivity analysis can be performed to understand the impact of changes to key parameters such as annual production volume, process yield and material pricing.
In short, TCM provides an understanding not only of current costs but also of how these costs might differ in the face of future technological or economic developments.
High-Density Packaging Technologies
Much has been published on microvia technology3,4 and chip-scale packaging5,6. Microvia technology, also called build-up technology, allows high-density circuitry on the outer layers of a circuit board, with lower, conventional-density circuitry on the inside layers.
These high-density circuit boards contain a conventional core, for rigidity and cost reasons, among others. Since the materials used in creating microvias tend not to have glass reinforcement, the core layers, which are glass reinforced, provide the rigidity needed for handling and end-use structural requirements.
Creating vias smaller than 6 to 8 mils (150 to 200 microns) in diameter, allows higher-density circuit layers to be created than with conventional technology in general. These vias are created through a myriad of technologies, including the following:
- Advanced mechanical drilling
- Lasers
- Photoimageable dielectric layers
- Plasma etching
Yields
Microvia technologies have been adopted by most large board fabricators and are being used by some OEMs, mainly in Japan. Reported yields achievable with microvia technology range from 50% to 95%, depending on the technology, how long the fabricator has been learning fabrication techniques and many other factors. Further details of each technology are presented elsewhere1.
Most §ash memory devices are being offered in CSPs for use in portable electronic products. Uses are on the horizon for many other ICs, but CSPs are just beginning to be employed outside of memory.
In summary, CSPs and microvias have "burst onto the scene" due to the demand for complex handheld products and other compact electronics. Since it can be construed that their implementation is driven mainly by the need for smaller form factors and not by cost, both microvias and CSPs have suffered from perceptions of high cost among potential users.
But is this necessarily true?
When a new technology is introduced, it tends to cost more, with the promise that, eventually, costs will be lower than they are today.
This situation occurs because volume production is necessary for costs to come down, and new technologies are usually introduced at low-volume levels. At their beginning, as customers "test the water" these low volumes often do not allow the new technology to cost less than the incumbent technology. This is happening today with CSPs and microvias.
Cost models can show if new technologies will, in fact, cost less at higher production volumes. This analysis shows some of the cost results from recent work at IBIS.
